BERSIM Bit Error Rate Simulator

基本解释误码率模拟器

网络释义

1)BERSIM Bit Error Rate Simulator,误码率模拟器2)bit error device,误码模拟3)Analog probability decoder,模拟概率译码器4)Analog decoder,模拟译码器5)analog decoder,模拟解码器6)analog encoder,模拟编码器

用法和例句

In this thesis,the basic theory of this bit error device is shown including SDH, E3 and so on.

在现代通信设备的研发和使用过程中,误码测试设备和误码模拟设备都发挥着重要的作用,利用好这些误码设备可以大大节约通信设备的开发时间和开发成本,方便通信设备的调试。

To study the design method of analog decoder,this paper realizes an analog probability computing module and fabricates a novel full analog probability decoder of(5,2,3) trellis code by CMOS circuits.

利用CMOS模拟电路设计了模拟概率计算模块,并以此为基础,通过晶体管级的模拟电路设计,构造了(5,2,3)网格码完整的新型模拟概率译码器,给出了模拟译码器的译码性能。

An Analog Decoder Realized by CMOS Circuits for(5,2,3) Trellis Code

一种(5,2,3)网格码CMOS电路模拟译码器

Novel Probability Decoder Designed by CMOS Analog Circuits

利用CMOS模拟电路设计实现的新型概率译码器

Design/Application of Hypothesized Instrument Digital Coding/Decoding Experiment Meter;

虚拟仪器数字编码/译码实验仪设计及应用

Research and Development of the Code Compiler of the Numerical Control Virtual Simulation System;

数控虚拟仿真系统代码编译器的研究与开发

Research on General G Code Compiler in Virtual Numeric Controling Producing;

虚拟数控加工通用G代码编译器的研究

Research of the Code Compiler of the NC Virtual Emulation System

数控加工虚拟仿真系统代码编译器的研究

Christmas tree type decoder

“圣诞树”型译码器

The network of intersections between input and output leads in a computer, functioning as an encoder or a decoder.

模型,压模计算机中输入和输出之间的交叉网,用作编码器和译码器

FPGA Implementation of SOVA-Based Turbo Decoder;

Turbo码SOVA译码器FPGA实现

multichannel analog-to-digital data encoder

多路模拟数字数据编码器

VCPPS:a Code Partitioner for Parallel Verilog Simulation

VCPPS:一种面向并行Verilog模拟的代码分割器

Design of Absolute Optical Encoder Decoder Circuit and Analog Circuit Fault Diagnosis

绝对式光电码盘译码电路设计及模拟电路故障诊断研究

The Realization of AVS-M Decoder and Emulation of Mobile Device;

AVS-M视频解码器的实现及移动设备模拟器仿真

A FORTRAN compiler accepts FORTRAN source code and generates a machine-level object module.

FORTRAN编译程序接受FORTRAN源码,也产生机器目标模块;

Implementation of Simulation and Compilation of Transactional Memory in Multi-Core Processors;

多核处理器的事务存储模型的模拟和编译实现

Research and development on the code compiler of the NC virtual emulation system

数控车削虚拟仿真系统代码编译器的研究与开发

In order to implement real-time correction of distortion, encoder must encode the digital signals synchronously when decoder begins to decode the analog signals.

为了实现畸变的实时校正,要求解码器对模拟信号解码与编码器对数字信号编码必须同步进行。

Design and implementation of a high-throughput decoder for multi-rate LDPC code

多码率LDPC码高速译码器的设计与实现

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