addressless instruction format

one-plus-one address instruction format

一加一地址指令格式

two-plus-one address instruction format

二加一地址指令格式

e address instruction format

四加一地址指令格式

n-plus-one address instruction format

ｎ加１地址指令格式

An instruction format containing four address parts.

一种包括四个地址部分的指令格式。

A method of addressing in which the address part of an instruction contains a relative address.

一种寻址方法，按照这种寻址法，指令的地址部分存放的是相对地址。

Instruction address: The address that contains the location of another which is to be referred to.

指令地址:标记的位置，是另一个需要引用的地址。

An instruction address in which the address part of the instruction is the operand.

一种指令地址，该指令的地址部分是操作数。同immediate address。

An instruction code containing no instruction code for the following address.

一种不含后续地址的指令代码。

microprogram address control instruction

微程序地址控制指令

An instruction that contains three address parts. The plus one address is the address of the next instruction to be executed unless otherwise specified.

一种包含三个地址部分、加上一个下一条要执行指令的地址(除非另有说明)的指令。

After every instruction fetch, if we increment this address, it will accurately point to the next instruction in the sequence.

在每次取指令后，如果我们使地址增量，那么就会准确地指向指令代码序列中的下一条指令。

Address calculations for memory referencing instructions are also performed here along with target address calculations for jump related instructions.

并与跳转相关指令的目标地址计算一起执行内存参考指令的地址计算。

You have selected import filtering, but no address formats are specified.

已经选定了导入筛选，但未指定地址格式。

A point in a computer program at which branching occurs, in particular the address or the label of an instruction.

计算机程序中出现分支的点，特指一条指令的地址或标号。

address-based microinstruction cycle

以地址为基础的微指令周期

A register in the processor that contains the address of the next instruction to be executed. Also known as a program counter.

包含下一条要执行指令地址的处理器中的寄存器。也叫程序计数器。

The process of altering the address portion of an instruction resulting from executing earlier instructions in a program.

由于程序中先前指令的执行而改变某一条指令的地址部分的处理方法。