sample hold

Designing of a 12-bit 60MS/s sample-and-hold circuit;

12位60MS/s采样保持电路的设计

A sample-and-hold(S/ H) circuit as the key part of the analog-to-digital(A/D) converter always attracts the researcher and designer of A/D converter.

采样保持电路作为流水线模数转换器中的重要单元一直是高速高分辨率模数转换器研究设计者十分关注的内容。

A low supply voltage sample-and-hold circuit for a pipelined analog-to-digital converter is described .

设计了一个用于流水线型模数转换器的低压采样保持电路。

4KVA switching power amplifier based on sample-hold strategy is developed for the AMB.

4kVA的采样保持型磁力轴承功率放大器。

An improved current-controlled tristate switching power amplifier based on sample-hold strategy is proposed in this paper.

提出一种改进的基于采样-保持策略的电流三态调制开关功放。

A switching amplifier based on sample-hold strategy is introduced.

给出了采样-保持策略用于开关型功率放大器设计的基本思想。

A CMOS high performance 50MS/s sample/hold circuit;

一种50 MHz采样速率CMOS采样/保持电路

A high speed、low distortion switched capacitance sample and hold circuit is presented.

本文设计了一种高速、低失真的开关电容采样保持电路,它采用了bootstrapped开关来降低非线性,并提出了减小放大器的建立时间的方法。

Study of Sample-and-hold Circuit Based on Pipeline ADC

基于流水线ADC的采样保持电路的研究

DESIGN OF A 10 bit,100 MHz SAMPLE-HOLD CIRCUIT

10位100MHz采样保持电路设计

The Research and Design of High Speed Sample and Hold Circuit of Pipelined ADC;

Pipelined ADC中高速采样保持电路的研究与设计

Design of 8 Bit Ultraspeed Track-and-Hold Circuit Based on 0.18μm CMOS Technology;

基于0.18μm CMOS工艺的8位超高速采样保持电路设计

Control Chaos Using a Sampling Holder and a Low Pass Filter

应用采样保持器和低通滤波器控制混沌

A Few Design Points about the Sampling/Holding and Amplifying Circuit Based on LF398

基于LF398的采样保持放大电路的设计要点

Simulation and Analysis of Capacitor Mismatch Error in Sample and Hold Circuit

对采样保持电路中电容失配的误差分析与仿真

A Method of Background Magnetic Field Compensation for Fluxgate Sensors Based on Sample and Hold Circuit

采样保持电路法补偿磁通门传感器背景磁场

A High Resolution Low Power Sample and Hold Module Dedicated to a Pipelined ADC

一个用于流水线模数转换器的高精度、低功耗采样保持电路

Design of High-speed and High-accuracy Track-and-Hold Circuit Based on 0.18μm CMOS Technology

基于0.18μm CMOS工艺的高速以及高精度采样保持电路设计

Research on an 8-bit 250-MSPS Sample and Hold Circuit;

一种8位250MSPS采样/保持电路的研究

A High Performance CMOS Sample and Hold Circuit

一种高性能CMOS采样/保持电路

Design and Implementation of a High-speed High-resolution Sample-and-hold Circuit

一种高速高精度采样/保持电路的设计与实现

Design of Sample/Hold Circuit for High-Speed 14-Bit A/D Converter

一种用于高速14位A/D转换器的采样/保持电路

High Performance Sample and Hold Circuit for Pipelined ADC

适用于流水线ADC的高性能采样/保持电路

A Sample/Hold Circuit for Low-Power High-Resolution A/D Converters

一种用于低功耗、高精度ADC的采样/保持电路

To take samples that retain the larger structure of the sediment, a core sampler is used.

为了保持样品沉积物的层次结构，就要用空心铁管采样器。

adopt/keep/maintain a low profile

采取[保持/维持]低姿态