first-order phase-locked loop

基本解释一阶锁相环

网络释义

1)first-order phase-locked loop,一阶锁相环2)third-order phase-locked loop,3阶锁相环3)Second order phase-locked loop,二阶锁相环4)Third-Order DPLL,三阶锁相环5)high-order PLL,高阶锁相环6)third-order type-3 phase-locked loop,三阶3型锁相环

用法和例句

Third-Order DPLL is often used in Carrier Tracking in deep space communicationtogether with AFC.

数字三阶锁相环用于深空通信中配合锁频环跟踪载波多谱勒频移。

EBPSK Demodulation Analysis Based on Second-order Phase Locked Loop

二阶锁相环的EBPSK信号解调分析

Non-linear Analysis of Second-order Phase-locked Loop by Phase Plain Approach in Numeric Domain

二阶锁相环路的数字域相图法非线性分析

Analysis on the Nonlinear-property of Two-order SPLL based on Matlab

基于Matlab的二阶取样锁相环非线性分析

Design of Fourth-Order PLL Synthesizer

一种四阶锁相频率合成器的环路设计

Analysis and Simulation of an Effective Five Order Charge Pump Phase Locked Loops

一种实用的5阶电荷泵锁相环性能分析与设计仿真

Behavior Modeling of PLL and Its Application in Video Horizontal PLL

锁相环行为级建模及在视频行锁相中的应用

Single-phase Phase-Locked Loop based on Modified Instantaneous Reactive Power Theory

基于改进瞬时无功理论的单相锁相环

Optimized implementation scheme of three phase phase-locked loop based on FPGA

基于FPGA的三相锁相环的优化设计方案

PLL lock time is below 15us,power dissipation is below 10mw.

该锁相环的锁定时间低于 15us,功耗小于 10mW。

The Study on Performance of Phase-Locked Loop Based on Mode-Locked Fiber Laser;

基于锁模光纤激光器的锁相环特性的研究

Two-phase locking protocol and tree locking protocol can be implemented on this system.

在此基础上可以实现二阶段锁协议和树协议。

Research on the Experiments of Laser Diode Array Phase Locked in External Cavity and High-Order Lateral Modes Locking;

半导体激光器列阵外腔锁相实验及高阶侧模锁定研究

Relationship Analysis between PLL Phase Noise and PLL Bandwidth

锁相环相位噪声与环路带宽的关系分析

Analysis of the Magnitude Frequency Responses of Software Phase-Locked Loop and Its Loop Filter

软件锁相环环路滤波器和闭环幅频响应分析

Special PLL used in target RF simulation of the radio detonator

引信目标射频仿真中的特殊锁相环路

A True Random Number Generator Based on PLL

一种基于锁相环的真随机数发生器

A Fast Acquisition PLL with Wide Tuning Range

一种快捕获宽调节范围的锁相环(英文)

Modeling, Design and Implementation of Phase-locked Loop Frequency Synthesizer;

锁相环频率合成器建模、设计与实现

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